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VLSI
2007
Springer
15 years 12 months ago
Simulation of hybrid computer architectures: simulators, methodologies and recommendations
— In the future, high performance computing systems may consist of multiple multicore processors and reconfigurable logic coprocessors. Industry trends indicate that such coproc...
Pranav Vaidya, Jaehwan John Lee
VLSI
2007
Springer
15 years 12 months ago
Parametric structure-preserving model order reduction
Abstract—Analysis and verification environments for nextgeneration nano-scale RFIC designs must be able to cope with increasing design complexity and to account for new effects,...
Jorge Fernandez Villena, Wil H. A. Schilders, L. M...
GLVLSI
2006
IEEE
110views VLSI» more  GLVLSI 2006»
15 years 12 months ago
Synthesis of a wideband low noise amplifier
Two generations of a wideband low noise amplifier (LNA) employing noise canceling principle have been synthesized. The first generation design was fabricated in a 0.35 µm SiGe Bi...
Abhishek Jajoo, Michael Sperling, Tamal Mukherjee
GLVLSI
2006
IEEE
165views VLSI» more  GLVLSI 2006»
15 years 12 months ago
Block alignment in 3D floorplan using layered TCG
In modern IC design, the number of long on-chip wires has been growing rapidly because of the increasing circuit complexity. Interconnect delay has dominated over gate delay as te...
Jill H. Y. Law, Evangeline F. Y. Young, Royce L. S...
GLVLSI
2006
IEEE
113views VLSI» more  GLVLSI 2006»
15 years 12 months ago
Statistical gate delay calculation with crosstalk alignment consideration
We study gate delay variation caused by crosstalk aggressor alignment, i.e., difference of signal arrival times in coupled neighboring interconnects. This effect is as significan...
Andrew B. Kahng, Bao Liu, Xu Xu