2449 search results - page 244 / 490 » VLSI |
153
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ISVLSI
2002
IEEE
15 years 10 months ago
2002
IEEE
An Early Completion technique is developed to significantly increase the throughput of NULL Convention self-timed digital systems without impacting latency or compromising their s...
191
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ISVLSI
2002
IEEE
15 years 10 months ago
2002
IEEE
With technology scaling, power supply and threshold voltage continue to decrease to satisfy high performance and low power requirements. In the past, subthreshold CMOS circuits ha...
192
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VLSID
2002
IEEE
15 years 10 months ago
2002
IEEE
We propose a timing-oriented logic optimization technique called Generalized De Morgan (GDM) transform, that integrates gate resizing, net buffering and De Morgan transformation. ...
171
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VLSID
2002
IEEE
15 years 10 months ago
2002
IEEE
This paper introduces a dynamic layout optimization strategy to minimize the number of cycles spent in memory accesses in a cache-based memory environment. In this approach, a giv...
203
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VLSID
2002
IEEE
15 years 10 months ago
2002
IEEE
à This paper addresses the problem of static and dynamic variable voltage scheduling of multi-rate periodic task graphs (i.e., tasks with precedence relationships) and aperiodic t...