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GLVLSI
2000
IEEE
85views VLSI» more  GLVLSI 2000»
15 years 10 months ago
Fast and accurate estimation of floorplans in logic/high-level synthesis
In many applications such as high-level synthesis (HLS) and logic synthesis and possibly engineering change order (ECO) we would like to get fast and accurate estimations of diffe...
Kia Bazargan, Abhishek Ranjan, Majid Sarrafzadeh
GLVLSI
2000
IEEE
113views VLSI» more  GLVLSI 2000»
15 years 10 months ago
A novel technique for sea of gates global routing
We present a novel global routing and cross-point assignment methodology for sea-of-gates (SOG) designs. Using the proposed congestion driven spanning trees (CDST), and continuous...
Bharat Krishna, C. Y. Roger Chen, Naresh Sehgal
VLSID
2000
IEEE
94views VLSI» more  VLSID 2000»
15 years 10 months ago
A Genetic Algorithm for the Synthesis of Structured Data Paths
The technique presented here achieves simultaneous optimization of schedule time and data path component cost within a structured data path architecture, using a genetic algorithm...
Chittaranjan A. Mandal, R. M. Zimmer
VLSID
2000
IEEE
102views VLSI» more  VLSID 2000»
15 years 10 months ago
Inductance Characterization of Small Interconnects Using Test-Signal Method
The test signal method can be used to measure and model inductance parameters (self and mutual) of a very small interconnect especially in highdensity IC’s by using a test signa...
Jeegar Tilak Shah, Madhav P. Desai, Sugata Sanyal
ARVLSI
1999
IEEE
112views VLSI» more  ARVLSI 1999»
15 years 10 months ago
Architectural Considerations for Application-Specific Counterflow Pipelines
Application-specific processor design is a promising approach for meeting the performance and cost goals of a system. Application-specific processors are especially promising for ...
Bruce R. Childers, Jack W. Davidson