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VLSID
1999
IEEE
100views VLSI» more  VLSID 1999»
15 years 10 months ago
Satisfiability-Based Detailed FPGA Routing
In this paper we address the problem of detailed FPGA routing using Boolean formulation methods. In the context of FPGA routing where routing resources are fixed, Boolean formulat...
Gi-Joon Nam, Karem A. Sakallah, Rob A. Rutenbar
VLSID
1999
IEEE
139views VLSI» more  VLSID 1999»
15 years 10 months ago
Processor Modeling for Hardware Software Codesign
In hardware - software codesign paradigm often a performance estimation of the system is needed for hardware - software partitioning. The tremendous growth of application specific...
V. Rajesh, Rajat Moona
VLSID
1999
IEEE
101views VLSI» more  VLSID 1999»
15 years 10 months ago
Formal System Design Based on the Synchrony Hypothesis, Functional Models and Skeletons
Formal approaches to HW and system design have not been generally adopted, because designers often view the modelling concepts in these approaches as unsuitable for their problems...
Ingo Sander, Axel Jantsch
VLSID
1999
IEEE
91views VLSI» more  VLSID 1999»
15 years 10 months ago
Timed Circuit Synthesis Using Implicit Methods
The design and synthesis of asynchronous circuits is gaining importance in both the industrial and academic worlds. Timed circuits are a class of asynchronous circuits that incorp...
Robert Thacker, Wendy Belluomini, Chris J. Myers
FCCM
1998
IEEE
119views VLSI» more  FCCM 1998»
15 years 10 months ago
Specifying and Compiling Applications for RaPiD
E cient, deeply pipelined implementations exist for a wide variety of important computation-intensive applications, and many special-purpose hardware machines have been built that...
Darren C. Cronquist, Paul Franklin, Stefan G. Berg...