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GLVLSI
2011
IEEE
351views VLSI» more  GLVLSI 2011»
14 years 10 months ago
Design of low-power multiple constant multiplications using low-complexity minimum depth operations
Existing optimization algorithms for the multiplierless realization of multiple constant multiplications (MCM) typically target the minimization of the number of addition and subt...
Levent Aksoy, Eduardo Costa, Paulo F. Flores, Jos&...
FCSC
2011
413views VLSI» more  FCSC 2011»
14 years 9 months ago
Type-2 fuzzy description logic
Description logics (DLs) are widely employed in recent semantic web application systems. However, classical description logics are limited when dealing with imprecise concepts and ...
Ruixuan Li, Kunmei Wen, Xiwu Gu, Yuhua Li, Xiaolin...
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DAC
2003
ACM
16 years 7 months ago
Parameter variations and impact on circuits and microarchitecture
Parameter variation in scaled technologies beyond 90nm will pose a major challenge for design of future high performance microprocessors. In this paper, we discuss process, voltag...
Shekhar Borkar, Tanay Karnik, Siva Narendra, James...
VLSID
2009
IEEE
87views VLSI» more  VLSID 2009»
16 years 6 months ago
Soft Error Rates with Inertial and Logical Masking
We analyze the neutron induced soft error rate (SER). An induced error pulse is modeled by two parameters, probability of occurrence and probability density function of the pulse ...
Fan Wang, Vishwani D. Agrawal
VLSID
2009
IEEE
150views VLSI» more  VLSID 2009»
16 years 6 months ago
TIGUAN: Thread-Parallel Integrated Test Pattern Generator Utilizing Satisfiability ANalysis
We present the automatic test pattern generator TIGUAN based on a thread-parallel SAT solver. Due to a tight integration of the SAT engine into the ATPG algorithm and a carefully ...
Alejandro Czutro, Ilia Polian, Matthew D. T. Lewis...