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ISVLSI
2006
IEEE
77views VLSI» more  ISVLSI 2006»
16 years 6 days ago
A Robust Synchronizer
We describe a new latch circuit designed to give a high performance in low voltage synchronizer applications. By increasing the latch current only during metastability, we can mor...
Jun Zhou, David Kinniment, Gordon Russell, Alexand...
ISVLSI
2006
IEEE
82views VLSI» more  ISVLSI 2006»
16 years 6 days ago
Optimal Periodical Memory Allocation for Logic-in-Memory Image Processors
One major issue in designing image processors is to design a memory system that supports parallel access with a simple interconnection network. This paper presents a design method...
Masanori Hariyama, Michitaka Kameyama, Yasuhiro Ko...
ISVLSI
2006
IEEE
88views VLSI» more  ISVLSI 2006»
16 years 6 days ago
Effects of Parameter Variations and Crosstalk Noise on H-Tree Clock Distribution Networks
— The effects of parameter variations and crosstalk noise on the clock signal propagating along an H-tree clock distribution network are investigated in this paper. In particular...
Itisha Chanodia, Dimitrios Velenis
DAC
2006
ACM
16 years 4 days ago
Electronics beyond nano-scale CMOS
This paper presents nano-scale CMOS outlook, discusses the three tenets that have made electronics successful in the past, and using these tenets conclude that there is nothing on...
Shekhar Borkar
SBCCI
2006
ACM
97views VLSI» more  SBCCI 2006»
16 years 4 days ago
An ultra low-power class-AB sinh integrator
A new ultra low-power Class-AB Sinh integrator is proposed here. The translinear companding integrator is based on hyperbolic-sine transconductors and uses only one grounded capac...
Sandro A. P. Haddad, Wouter A. Serdijn