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DFT
2005
IEEE
103views VLSI» more  DFT 2005»
15 years 11 months ago
Methodologies and Algorithms for Testing Switch-Based NoC Interconnects
In this paper, we present two novel methodologies for testing the interconnect fabrics of network-on-chip (NoC) based chips. Both use the concept of recursive testing, with differ...
Cristian Grecu, Partha Pratim Pande, Baosheng Wang...
DFT
2005
IEEE
200views VLSI» more  DFT 2005»
15 years 11 months ago
Data Dependent Jitter (DDJ) Characterization Methodology
A new jitter model is developed using Matlab and Spice to analyze Data Dependent Jitter (DDJ) in serial data integrated circuits. The simulation results show that DDJ is dependent...
Kyung Ki Kim, Yong-Bin Kim, Fabrizio Lombardi
DFT
2005
IEEE
110views VLSI» more  DFT 2005»
15 years 11 months ago
A design flow for protecting FPGA-based systems against single event upsets
SRAM-based Field Programmable Gate Arrays (FPGAs) are very susceptible to Single Event Upsets (SEUs) that may have dramatic effects on the circuits they implement. In this paper w...
Luca Sterpone, Massimo Violante
FCCM
2005
IEEE
151views VLSI» more  FCCM 2005»
15 years 11 months ago
Accelerating Applications by Mapping Critical Kernels on Coarse-Grain Reconfigurable Hardware in Hybrid Systems
In this paper, we propose a method for speeding-up applications by partitioning them between the reconfigurable hardware blocks of different granularity and mapping critical parts...
Michalis D. Galanis, Grigoris Dimitroulakos, Costa...
FCCM
2005
IEEE
96views VLSI» more  FCCM 2005»
15 years 11 months ago
Preliminary Report: FPGA Acceleration of Molecular Dynamics Computations
Abstract: Molecular Dynamics (MD) is of central importance to computational chemistry and its myriad applications. Here we show that, at even a preliminary stage of development, MD...
Yongfeng Gu, Tom Van Court, Douglas DiSabello, Mar...