2449 search results - page 283 / 490 » VLSI |
143
click to vote
DATE
2002
IEEE
15 years 11 months ago
2002
IEEE
After the discussion on the difference between floorplanning and packing in VLSI placement design, this paper adapts the floorplanner that is based on the Q-sequence to a packin...
104
click to vote
ISCAS
2002
IEEE
15 years 11 months ago
2002
IEEE
In this paper, we extend our generalized methodology for designing lower-error area-efficient fixed-width two’s-complement multipliers that receive two s -bit numbers and produc...
141
click to vote
ISSS
2002
IEEE
15 years 11 months ago
2002
IEEE
We propose a high-level analytical model for estimating the energy and/or power dissipation in VLSI processor (systolic) array implementations of loop programs, particularly for i...
179
click to vote
VTS
2002
IEEE
15 years 11 months ago
2002
IEEE
High defect coverage requires good coverage of different fault types. In this paper, we present a comprehensive test vector generation technique for BIST, called Random Single Inp...
159
click to vote
EH
2000
IEEE
15 years 10 months ago
2000
IEEE
How do we know the correctness of an evolved circuit? While Evolutionary Hardware is exhibiting its effectiveness, we argue that it is very difficult to design a large-scale digit...