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TVLSI
2002
82views more  TVLSI 2002»
15 years 5 months ago
Probability-based approach to rectilinear Steiner tree problems
Abstract--The rectilinear Steiner tree (RST) problem is of essential importance to the automatic interconnect optimization for VLSI design. In this paper, we present a class of pro...
Chunhong Chen, Jiang Zhao, Majid Ahmadi
FFA
2011
176views more  FFA 2011»
14 years 9 months ago
Exponential sums and polynomial congruences along p-adic submanifolds
In this article, we consider the estimation of exponential sums along the points of the reduction mod pm of a p-adic analytic submanifold of Zn p . More precisely, we extend Igusaâ...
Dirk Segers, W. A. Zuniga-Galindo
149
Voted
DAC
2000
ACM
16 years 7 months ago
Can recursive bisection alone produce routable placements?
This work focuses on congestion-driven placement of standard cells into rows in the fixed-die context. We summarize the stateof-the-art after two decades of research in recursive ...
Andrew E. Caldwell, Andrew B. Kahng, Igor L. Marko...
VLSID
2002
IEEE
159views VLSI» more  VLSID 2002»
16 years 6 months ago
Challenges in the Design of a Scalable Data-Acquisition and Processing System-on-Silicon
Increasing complexity of the functionalities and the resultant growth in number of gates integrated in a chip coupled with shrinking geometries and short cycle time requirements br...
Karanth Shankaranarayana, Soujanna Sarkar, R. Venk...
GLVLSI
2008
IEEE
147views VLSI» more  GLVLSI 2008»
16 years 22 days ago
Statistical timing analysis of flip-flops considering codependent setup and hold times
Statistical static timing analysis (SSTA) plays a key role in determining performance of the VLSI circuits implemented in state-of-the-art CMOS technology. A pre-requisite for emp...
Safar Hatami, Hamed Abrishami, Massoud Pedram