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FCCM
2008
IEEE
112views VLSI» more  FCCM 2008»
15 years 11 months ago
Power-Aware and Branch-Aware Word-Length Optimization
Power reduction is becoming more important as circuit size increases. This paper presents a tool called PowerCutter which employs accuracy-guaranteed word-length optimization to r...
William G. Osborne, José Gabriel F. Coutinh...
FCCM
2008
IEEE
114views VLSI» more  FCCM 2008»
15 years 11 months ago
Scaling Soft Processor Systems
As FPGA-based systems including soft-processors become increasingly common we are motivated to better understand the best way to scale the performance of such systems. In this pap...
Martin Labrecque, Peter Yiannacouras, J. Gregory S...
ISCAS
2008
IEEE
170views Hardware» more  ISCAS 2008»
15 years 11 months ago
Integrated circuit implementation of a cortical neuron
— This paper presents an analogue integrated circuit implementation of a cortical neuron model. The VLSI chip prototype has been implemented in a 0.35 µm CMOS technology. The si...
Jayawan H. B. Wijekoon, Piotr Dudek
ISCAS
2008
IEEE
287views Hardware» more  ISCAS 2008»
15 years 11 months ago
A high speed word level finite field multiplier using reordered normal basis
— Reordered normal basis is a certain permutation of a type II optimal normal basis. In this paper, a high speed design of a word level finite field multiplier using reordered ...
Ashkan Hosseinzadeh Namin, Huapeng Wu, Majid Ahmad...
RECONFIG
2008
IEEE
156views VLSI» more  RECONFIG 2008»
15 years 11 months ago
Forward-Secure Content Distribution to Reconfigurable Hardware
Confidentiality and integrity of bitstreams and authenticated update of FPGA configurations are fundamental to trusted computing on reconfigurable technology. In this paper, we pr...
David Champagne, Reouven Elbaz, Catherine H. Gebot...