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DFT
2007
IEEE
104views VLSI» more  DFT 2007»
15 years 11 months ago
Reduction of Fault Latency in Sequential Circuits by using Decomposition
The paper discusses a novel approach for reduction of fault detection latency in a selfchecking sequential circuit. The Authors propose decomposing the finite state machine (FSM) ...
Ilya Levin, Benjamin Abramov, Vladimir Ostrovsky
DFT
2007
IEEE
86views VLSI» more  DFT 2007»
15 years 11 months ago
Production Yield and Self-Configuration in the Future Massively Defective Nanochips
We address two problems in this work, namely, 1) the resilience challenge in the future chips made up of massively defective nanoelements and organized in replicative multicore ar...
Piotr Zajac, Jacques Henri Collet
FCCM
2007
IEEE
169views VLSI» more  FCCM 2007»
15 years 11 months ago
FPGA-Based Multigrid Computation for Molecular Dynamics Simulations
Abstract: FPGA-based acceleration of molecular dynamics (MD) has been the subject of several recent studies. Implementing long-range forces, however, has only recently been address...
Yongfeng Gu, Martin C. Herbordt
FCCM
2007
IEEE
117views VLSI» more  FCCM 2007»
15 years 11 months ago
FPGA Acceleration of Gene Rearrangement Analysis
In this paper we present our work toward FPGA acceleration of phylogenetic reconstruction, a type of analysis that is commonly performed in the fields of systematic biology and co...
Jason D. Bakos
FCCM
2007
IEEE
124views VLSI» more  FCCM 2007»
15 years 11 months ago
A Hybrid Memory Sub-system for Video Coding Applications
This paper introduces a parameterisable, application and platform-independent, hybrid memory sub-system for custom hardware. This memory sub-system consists of a scratchpad memory...
Su-Shin Ang, George A. Constantinides, Wayne Luk, ...