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IPPS
1997
IEEE
15 years 9 months ago
Parallel Simulated Annealing: An Adaptive Approach
This paper analyses alternatives for the parallelization of the Simulated Annealing algorithm when applied to the placement of modules in a VLSI circuit considering the use of PVM...
Jonas Knopman, Júlio S. Aude
ISLPED
1997
ACM
124views Hardware» more  ISLPED 1997»
15 years 9 months ago
Low power high level synthesis by increasing data correlation
With the increasing performance and density of VLSI circuits as well as the popularity of portable devices such as personal digital assistance, power consumption has emerged as an...
Dongwan Shin, Kiyoung Choi
ISPD
1997
ACM
105views Hardware» more  ISPD 1997»
15 years 9 months ago
Regular layout generation of logically optimized datapaths
The inherent distortion of the structural regularity of VLSI datapaths after logic optimization has until now precluded dense regular layouts of optimized datapaths despite their ...
R. X. T. Nijssen, C. A. J. van Eijk
IPPS
1996
IEEE
15 years 9 months ago
A New Approach to Pipeline FFT Processor
A new VLSI architecture for real-time pipeline FFT processor is proposed. A hardware oriented radix-22 algorithm is derived by integrating a twiddle factor decomposition technique ...
Shousheng He, Mats Torkelson
GD
1997
Springer
15 years 9 months ago
Implementing a General-Purpose Edge Router
Although routing is a well-studied problem in various contexts, there remain unsolved problems in routing edges for graph layouts. In contrast with techniques from other domains su...
David P. Dobkin, Emden R. Gansner, Eleftherios Kou...