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EURODAC
1994
IEEE
110views VHDL» more  EURODAC 1994»
15 years 9 months ago
Symbolic exploration of large circuits with enhanced forward/backward traversals
Symbolic state space exploration techniques for Finite State Machines (FSMs) are a major recent result in CAD for VLSI. Most of them are exact and based on forward traversal, but ...
Gianpiero Cabodi, Paolo Camurati, Stefano Quer
ISCAS
1993
IEEE
133views Hardware» more  ISCAS 1993»
15 years 9 months ago
An efficient FIR filter architecture
– This paper describes an efficient architecture for FIR filters. By exploiting the reduced complexity made possible by the use of sparse powers-of-two coefficients, an FIR ...
Joseph B. Evans
ISCAS
1994
IEEE
104views Hardware» more  ISCAS 1994»
15 years 9 months ago
Stereo Correspondence with Discrete-Time Cellular Neural Networks
In this paper, we propose a new approach of solving the stereopsis problem with a discrete-time cellular neural network(DTCNN) where each node has connectionsonly with its local n...
Sungjun Park, Seung-Jai Min, Soo-Ik Chae
ANCS
2007
ACM
15 years 9 months ago
Design of adaptive communication channel buffers for low-power area-efficient network-on-chip architecture
Network-on-Chip (NoC) architectures provide a scalable solution to the wire delay constraints in deep submicron VLSI designs. Recent research into the optimization of NoC architec...
Avinash Karanth Kodi, Ashwini Sarathy, Ahmed Louri
135
Voted
ASPDAC
2007
ACM
122views Hardware» more  ASPDAC 2007»
15 years 9 months ago
Predicting the Performance and Reliability of Carbon Nanotube Bundles for On-Chip Interconnect
Single-walled carbon nanotube (SWCNT) bundles have the potential to provide an attractive solution for the resistivity and electromigration problems faced by traditional copper int...
Arthur Nieuwoudt, Mosin Mondal, Yehia Massoud