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VLSI
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DFT
2004
IEEE
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Exploiting an I-IP for In-Field SOC Test
15 years 7 months ago
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Paolo Bernardi, Maurizio Rebaudengo, Matteo Sonza ...
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FCCM
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A 21.54 Gbits/s Fully Pipelined AES Processor on FPGA
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Alireza Hodjat, Ingrid Verbauwhede
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Unidirectional Switch-Boxes for Synthesizable Reconfigurable Arrays
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Sami Khawam, Tughrul Arslan, Fred Westall
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ShareStreams: A Scalable Architecture and Hardware Support for High-Speed QoS Packet Schedulers
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Raj Krishnamurthy, Sudhakar Yalamanchili, Karsten ...
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IEEE
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Hardware-in-the-Loop Evolution of a 3-bit Multiplier
15 years 7 months ago
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Gregory V. Larchev, Jason D. Lohn
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