Sciweavers

2449 search results - page 364 / 490
» VLSI
Sort
View
VLSID
2000
IEEE
90views VLSI» more  VLSID 2000»
15 years 9 months ago
Performance Analysis of Systems with Multi-Channel Communication Architectures
This paper presents a novel system performance analysis technique to support the design of custom communication architectures for System-on-Chip ICs. Our technique fills a gap in...
Kanishka Lahiri, Sujit Dey, Anand Raghunathan
FCCM
1999
IEEE
134views VLSI» more  FCCM 1999»
15 years 8 months ago
Runlength Compression Techniques for FPGA Configurations
The time it takes to reconfigure FPGAs can be a significant overhead for reconfigurable computing. In this paper we develop new compression algorithms for FPGA configurations that...
Scott Hauck, William D. Wilson
124
Voted
VLSID
1999
IEEE
87views VLSI» more  VLSID 1999»
15 years 8 months ago
Digital Circuit Design for Minimum Transient Energy and a Linear Programming Method
This paper provides a theoretical basis for eliminating or reducing the energy consumption due to transients in a synchronous digital circuit. The transient energy is minimized wh...
Vishwani D. Agrawal, Michael L. Bushnell, Ganapath...
FCCM
1998
IEEE
107views VLSI» more  FCCM 1998»
15 years 8 months ago
Frequency-Domain Sonar Processing in FPGAs and DSPs
Over the past year we have been exploring the use of FPGA-based custom computing machines for several sonar beamforming applications, including time-domain beamforming[1], frequen...
Paul Graham, Brent E. Nelson
FCCM
1998
IEEE
149views VLSI» more  FCCM 1998»
15 years 8 months ago
Configuration Compression for the Xilinx XC6200 FPGA
One of the major overheads in reconfigurable computing is the time it takes to reconfigure the devices in the system. This overhead limits the speedups possible in this exciting n...
Scott Hauck, Zhiyuan Li, Eric J. Schwabe