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146
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DFT
2004
IEEE
15 years 8 months ago
2004
IEEE
This paper presents theoretical yet practical methodologies to model, assure and optimize the Reliability of Clockless Wave Pipeline. Clockless wave pipeline is a cutting-edge and...
169
Voted
FCCM
2004
IEEE
15 years 8 months ago
2004
IEEE
Dynamically reconfigurable architectures or systems are able to reconfigure their function and/or structure to suit changing needs of a computation during run time. The increasing...
148
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FCCM
2004
IEEE
15 years 8 months ago
2004
IEEE
We describe a flexible hardware encoder for regular and irregular low-density parity-check (LDPC) codes. Although LDPC codes achieve achieve better performance and lower decoding ...
146
Voted
FCCM
2004
IEEE
15 years 8 months ago
2004
IEEE
Reconfigurable System-on-Chip (SoC) platforms that incorporate hard-core processors surrounded by large amounts of FPGA are today commodities: the reconfigurable logic is often us...
162
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FCCM
2004
IEEE
15 years 8 months ago
2004
IEEE
Dynamically Reconfigurable Processor (DRP)[1] developed by NEC Electronics is a coarse grain reconfigurable processor that selects a data path from the on-chip repository of sixte...