In this paper, a new logic synthesis method for an AND-XOR-OR type sense-amplifying PLA is proposed. An AND-XOR-OR type sense-amplifying PLA can achieve lowpower dissipation and h...
In this paper we describe a hardware design method for memory and register arrays that allows the application of formal equivalence checking for comparing a high-level register tr...
The need for low-power multimedia processing is integral to portable and embedded devices such as cell phones, wireless terminals, multimedia handhelds and PDAs. The multimedia pr...
Memory represents a major bottleneck in modern embedded systems. Traditionally, memory organizationsfor programmable systems assumed a fixed cache hierarchy. Withthe wideningproce...
Prabhat Mishra, Peter Grun, Nikil D. Dutt, Alexand...
This paper presents novel techniques for the cycle-accurate power macro-modeling of complex RTL components. The proposed techniques are based on the observation that RTL component...
Nachiketh R. Potlapally, Michael S. Hsiao, Anand R...