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FCCM
2008
IEEE
165views VLSI» more  FCCM 2008»
15 years 10 months ago
Performance Analysis with High-Level Languages for High-Performance Reconfigurable Computing
High-Level Languages (HLLs) for FPGAs (FieldProgrammable Gate Arrays) facilitate the use of reconfigurable computing resources for application developers by using familiar, higher...
John Curreri, Seth Koehler, Brian Holland, Alan D....
FCCM
2008
IEEE
133views VLSI» more  FCCM 2008»
15 years 10 months ago
Autonomous System on a Chip Adaptation through Partial Runtime Reconfiguration
This paper presents a proto-type autonomous signal processing system on a chip. The system is architected such that high performance digital signal processing occurs in the FPGA...
Matthew French, Erik Anderson, Dong-In Kang
RECONFIG
2008
IEEE
140views VLSI» more  RECONFIG 2008»
15 years 10 months ago
Generalised Parallel Bilinear Interpolation Architecture for Vision Systems
Bilinear interpolation is widely used in computer vision for extracting pixel values for positions that lie off the pixel grid in an image. For each sub-pixel, the values of four ...
Suhaib A. Fahmy
RECONFIG
2008
IEEE
268views VLSI» more  RECONFIG 2008»
15 years 10 months ago
Parametric, Secure and Compact Implementation of RSA on FPGA
1 We present a fast, efficient, and parameterized modular multiplier and a secure exponentiation circuit especially intended for FPGAs on the low end of the price range. The desig...
Ersin Oksuzoglu, Erkay Savas
RECONFIG
2008
IEEE
224views VLSI» more  RECONFIG 2008»
15 years 10 months ago
Automatic Construction of Large-Scale Regular Expression Matching Engines on FPGA
—We present algorithms for implementing large-scale regular expression matching (REM) on FPGA. Based on the proposed algorithms, we develop tools that first transform regular ex...
Yi-Hua E. Yang, Viktor K. Prasanna