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VLSID
2006
IEEE
112views VLSI» more  VLSID 2006»
15 years 10 months ago
Handling Constraints in Multi-Objective GA for Embedded System Design
Design space exploration is central to embedded system design. Typically this is a multi-objective search problem, where performance, power, area etc. are the different optimizati...
Biman Chakraborty, Ting Chen, Tulika Mitra, Abhik ...
VLSID
2006
IEEE
158views VLSI» more  VLSID 2006»
15 years 10 months ago
Programmable LDPC Decoder Based on the Bubble-Sort Algorithm
Low density parity check (LDPC) codes are one of the most powerful error correcting codes known. Recent research have pointed out their potential for a low cost, low latency hardw...
Rohit Singhal, Gwan S. Choi, Rabi N. Mahapatra
VLSID
2006
IEEE
145views VLSI» more  VLSID 2006»
15 years 10 months ago
Novel BCD Adders and Their Reversible Logic Implementation for IEEE 754r Format
IEEE 754r is the ongoing revision to the IEEE 754 floating point standard and a major enhancement to the standard is the addition of decimal format. This paper proposes two novel ...
Himanshu Thapliyal, Saurabh Kotiyal, M. B. Sriniva...
ASPDAC
2006
ACM
104views Hardware» more  ASPDAC 2006»
15 years 10 months ago
A multi-technology-process reticle floorplanner and wafer dicing planner for multi-project wafers
—As the VLSI manufacturing technology advances into the deep sub-micron(DSM) era, the mask cost can reach one or two million dollars. Multiple project wafers (MPW) which put diï¬...
Chien-Chang Chen, Wai-Kei Mak
148
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ASPDAC
2006
ACM
143views Hardware» more  ASPDAC 2006»
15 years 10 months ago
CDCTree: novel obstacle-avoiding routing tree construction based on current driven circuit model
Abstract— Routing tree construction is a fundamental problem in modern VLSI design. In this paper we propose CDCTree, an Obstacle-Avoiding Rectilinear Steiner Minimum Tree (OARSM...
Yiyu Shi, Tong Jing, Lei He, Zhe Feng 0002, Xianlo...