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ASPDAC
2004
ACM
151views Hardware» more  ASPDAC 2004»
15 years 3 months ago
Combinatorial group testing methods for the BIST diagnosis problem
— We examine an abstract formulation of BIST diagnosis in digital logic systems. The BIST diagnosis problem has applications that include identification of erroneous test vector...
Andrew B. Kahng, Sherief Reda
PADS
2004
ACM
15 years 3 months ago
Event Reconstruction in Time Warp
In optimistic simulations, checkpointing techniques are often used to reduce the overhead caused by state saving. In this paper, we propose event reconstruction as a technique wit...
Lijun Li, Carl Tropper
SBCCI
2004
ACM
127views VLSI» more  SBCCI 2004»
15 years 3 months ago
A formal software synthesis approach for embedded hard real-time systems
Software synthesis is defined as the task of translating a specification into a software program, in a general purpose language, in such a way that this software can be compiled...
Raimundo S. Barreto, Marília Neves, Meuse N...
SBCCI
2004
ACM
117views VLSI» more  SBCCI 2004»
15 years 3 months ago
Reducing test time with processor reuse in network-on-chip based systems
This paper proposes a test planning method capable of reusing available processors as test sources and sinks, and the on-chip network as the access mechanism for the test of cores...
Alexandre M. Amory, Érika F. Cota, Marcelo ...
SBCCI
2004
ACM
111views VLSI» more  SBCCI 2004»
15 years 3 months ago
A partial reconfigurable architecture for controllers based on Petri nets
Digital Control System in the industry has been used in most of the applications based on expensive Programmable Logical Controllers (PLC). These Systems are, in general, highly c...
Paulo Sérgio B. do Nascimento, Paulo Romero...