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DFT
2003
IEEE
15 years 3 months ago
2003
IEEE
1 This paper presents a solution to the test time minimization problem for core-based systems that contain sequential cores with STUMPS architecture. We assume a hybrid BIST approa...
DFT
2003
IEEE
15 years 3 months ago
2003
IEEE
Test scheduling and Test Access Mechanism (TAM) design are two important tasks in the development of a System-on-Chip (SOC) test solution. Previous test scheduling techniques assu...
DFT
2003
IEEE
15 years 3 months ago
2003
IEEE
1 Today many safety-critical applications are based on distributed systems where several computing nodes exchange information via suitable network interconnections. An example of t...
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DFT
2003
IEEE
15 years 3 months ago
2003
IEEE
This paper presents an approach for integrating fault-tolerance techniques into microprocessors by utilizing instruction redundancy as well as time redundancy. Smaller and smaller...
FCCM
2003
IEEE
15 years 3 months ago
2003
IEEE
Although domain-specialized FPGAs can offer significant area, speed and power improvements over conventional reconfigurable devices, there are several unique and unexplored design...