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FPL
2009
Springer
102views Hardware» more  FPL 2009»
15 years 2 months ago
Macs: A Minimal Adaptive routing circuit-switched architecture for scalable and parametric NoCs
Networks-on-Chips (NoCs) are an emerging communication topology paradigm in single chip VLSI design, enhancing parallelism and system scalability. Processing units (PUs) connect t...
Rohit Kumar, Ann Gordon-Ross
EMSOFT
2001
Springer
15 years 2 months ago
Compiler Optimizations for Adaptive EPIC Processors
Abstract. Advances in VLSI technology have lead to a tremendous increase in the density and number of devices that can be manufactured in a single microchip. One of the interesting...
Krishna V. Palem, Surendranath Talla, Weng-Fai Won...
EUROCAST
2001
Springer
106views Hardware» more  EUROCAST 2001»
15 years 2 months ago
On CAST.FSM Computation of Hierarchical Multi-layer Networks of Automata
CAST.FSM denotes a CAST tool which has been developed at the Institute of Systems Science at the University of Linz during the years 1986-1993. The first version of CAST.FSM was i...
Michael Affenzeller, Franz Pichler, Rudolf Mittelm...
ICIAP
2001
Springer
15 years 2 months ago
A Neurodynamical Retinal Network Based on Reaction-Diffusion Systems
A dynamical model for retinal processing is presented. The model describes the output of retinal ganglion cells whose receptive field is composed of a center and a surround combi...
Matthias S. Keil, Gabriel Cristóbal, Heiko ...
WADS
2001
Springer
86views Algorithms» more  WADS 2001»
15 years 2 months ago
Practical Approximation Algorithms for Separable Packing Linear Programs
Abstract. We describe fully polynomial time approximation schemes for generalized multicommodity flow problems arising in VLSI applications such as Global Routing via Buffer Block...
Feodor F. Dragan, Andrew B. Kahng, Ion I. Mandoiu,...