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ICCAD
1999
IEEE
15 years 2 months ago
1999
IEEE
We consider the problem of finding an optimal clock schedule, i.e. optimal arrival times for clock signals at latches of a VLSI chip. We describe a general model which includes al...
IPPS
1999
IEEE
15 years 2 months ago
1999
IEEE
Abstract. Themain contributionof thiswork isto propose a numberof broadcastefficient VLSI architectures for computing the sum and the prefix sums of a w k-bit, k 2, binary sequenc...
ISCA
1999
IEEE
15 years 2 months ago
1999
IEEE
In the pursuit of instruction-level parallelism, significant demands are placed on a processor's instruction delivery mechanism. Delivering the performance necessary to meet ...
ISCAS
1999
IEEE
15 years 2 months ago
1999
IEEE
- A closed form expression for the propagation delay of a CMOS gate driving a distributed RLC line is introduced that is within 5% of dynamic circuit simulations for a wide range o...
ICS
1999
Tsinghua U.
15 years 2 months ago
1999
Tsinghua U.
Supercomputer performance is highly dependent on its interconnection subsystem design. In this paper we study how di erent architectural approaches for router design impact into s...