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GECCO
2009
Springer
130views Optimization» more  GECCO 2009»
15 years 4 months ago
Liposome logic
VLSI research, in its continuous push toward further miniaturisation, is seeking to break through the limitations of current circuit manufacture techniques by moving towards biomi...
James Smaldon, Natalio Krasnogor, Alexander Camero...
ISLPED
2009
ACM
168views Hardware» more  ISLPED 2009»
15 years 4 months ago
Low power circuit design based on heterojunction tunneling transistors (HETTs)
The theoretical lower limit of subthreshold swing in MOSFETs (60 mV/decade) significantly restricts low voltage operation since it results in a low ON to OFF current ratio at low ...
Daeyeon Kim, Yoonmyung Lee, Jin Cai, Isaac Lauer, ...
78
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FCCM
2008
IEEE
160views VLSI» more  FCCM 2008»
15 years 4 months ago
Facilitating Processor-Based DPR Systems for non-DPR Experts
Currently, only Xilinx Field Programmable Gate Arrays (FPGAs) support Dynamic Partial Reconfiguration (DPR). While there is currently some Computer Aided Design (CAD) tool support...
Edward Chen, William A. Gruver, Dorian Sabaz, Lesl...
FCCM
2008
IEEE
212views VLSI» more  FCCM 2008»
15 years 4 months ago
Map-reduce as a Programming Model for Custom Computing Machines
The map-reduce model requires users to express their problem in terms of a map function that processes single records in a stream, and a reduce function that merges all mapped out...
Jackson H. C. Yeung, C. C. Tsang, Kuen Hung Tsoi, ...
ICCAD
2008
IEEE
130views Hardware» more  ICCAD 2008»
15 years 4 months ago
Area-I/O flip-chip routing for chip-package co-design
— The area-I/O flip-chip package provides a high chip-density solution to the demand of more I/O’s in VLSI designs; it can achieve smaller package size, shorter wirelength, an...
Jia-Wei Fang, Yao-Wen Chang