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ICIP
1994
IEEE
15 years 11 months ago
Full Custom VLSI Implementation of High-Speed 2-D DCT/IDCT Chip
In this paper we present a full-custom VLSI design of highspeed 2-D DCT/IDCT processor based on the new class of time-recursive algorithms and architectures which has never been i...
Vishnu Srinivasan, K. J. Ray Liu
DAC
1999
ACM
15 years 10 months ago
On Thermal Effects in Deep Sub-Micron VLSI Interconnects
Kaustav Banerjee, Amit Mehrotra, Alberto L. Sangio...
ARITH
2003
IEEE
15 years 3 months ago
Energy-Delay Estimation Technique for High-Performance Microprocessor VLSI Adders
In this paper, we motivate the concept of comparing VLSI adders based on their energy-delay trade-offs and present a technique for estimating the energy-delay space of various hig...
Vojin G. Oklobdzija, Bart R. Zeydel, Hoang Q. Dao,...
DFT
2003
IEEE
106views VLSI» more  DFT 2003»
15 years 3 months ago
Techniques for Transient Fault Sensitivity Analysis and Reduction in VLSI Circuits
Transient faults in VLSI circuits could lead to disastrous consequences. With technology scaling, circuits are becoming increasingly vulnerable to transient faults. This papers pr...
Atul Maheshwari, Israel Koren, Wayne Burleson
ISLPED
1999
ACM
177views Hardware» more  ISLPED 1999»
15 years 2 months ago
Low power synthesis of dual threshold voltage CMOS VLSI circuits
The use of dual threshold voltages can significantly reduce the static power dissipated in CMOS VLSI circuits. With the supply voltage at 1V and threshold voltage as low as 0.2V ...
Vijay Sundararajan, Keshab K. Parhi