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ISQED
2009
IEEE
328views Hardware» more  ISQED 2009»
15 years 4 months ago
VLSI architectures of perceptual based video watermarking for real-time copyright protection
For effective digital rights management (DRM) of multimedia in the framework of embedded systems, both watermarking and cryptography are necessary. In this paper, we present a wat...
Saraju P. Mohanty, Elias Kougianos, Wei Cai, Manis...
ASPDAC
1998
ACM
107views Hardware» more  ASPDAC 1998»
15 years 2 months ago
VLSI for Multimedia U-NII WLANs
- This paper summarizes aspects of the VLSI development of a high-speed wireless local area network (WLAN). The implications for system-on-achip designs are summarized.
Neil Weste, David J. Skellern, Terry Percival
VLSID
2006
IEEE
144views VLSI» more  VLSID 2006»
15 years 10 months ago
A High-Performance VLSI Architecture for Advanced Encryption Standard (AES) Algorithm
In this paper we present a high-performance, high throughput, and area efficient architecture for the VLSI implementation of the AES algorithm. The subkeys, required for each round...
Naga M. Kosaraju, Murali R. Varanasi, Saraju P. Mo...
VLSID
2002
IEEE
102views VLSI» more  VLSID 2002»
15 years 10 months ago
Losses in Multilevel Crossover in VLSI Interconnects
The radiation and surface wave losses may give rise to electromagnetic interference (EMI) problems in high speed VLSI interconnects. Over and above there will be dielectric and co...
P. K. Datta, S. Sanyal, D. Bhattacharya
ICCD
2002
IEEE
127views Hardware» more  ICCD 2002»
15 years 6 months ago
GPE: A New Representation for VLSI Floorplan Problem
In this paper, we propose a new representation of VLSI floorplan and building block problem. The representation is the generalization of Polish expression [1]. By proposing a new ...
Chang-Tzu Lin, De-Sheng Chen, Yi-Wen Wang