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104
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CODES
2005
IEEE
15 years 3 months ago
2005
IEEE
In this paper, we present the analysis, design and implementation of an estimator to realize large bit width unsigned integer multiplier units. Larger multiplier units are require...
CHI
2009
ACM
15 years 10 months ago
2009
ACM
Senior citizens often find it difficult to remember names. This paper describes a novel cell phone application that uses information about one's social network and the places...
DATE
2008
IEEE
15 years 4 months ago
2008
IEEE
Extending 2-D planar topologies in integrated circuits (ICs) to a 3-D implementation has the obvious benefits of reducing the overall footprint and average interconnection length,...
66
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FPL
2007
Springer
15 years 3 months ago
2007
Springer
This paper presents a novel architecture for domain-specific FPGA devices. This architecture can be optimised for both speed and density by exploiting domain-specific informatio...
GLVLSI
2003
IEEE
15 years 2 months ago
2003
IEEE
An embedded 40 MHz FIFO buffer for use in mixed-signal information processing applications is presented. The buffer design uses a 1T DRAM topology for its unit memory cell compone...