428 search results - page 11 / 86 » Validating High-Level Synthesis |
103
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DATE
2005
IEEE
15 years 5 months ago
2005
IEEE
Importance of addressing soft errors in both safety critical applications and commercial consumer products is increasing, mainly due to ever shrinking geometries, higher-density c...
DATE
2003
IEEE
15 years 5 months ago
2003
IEEE
We present two novel strategies to increase the scope for application of speculative code motions: (1) Adding scheduling steps dynamically during scheduling to conditional branche...
114
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ISSS
2000
IEEE
15 years 4 months ago
2000
IEEE
This paper addresses the problem of estimating lower bounds on the power consumption in scheduled data flow graphs with a fixed number of allocated resources prior to binding. T...
VLSID
2009
IEEE
16 years 9 days ago
2009
IEEE
: The challenges in nano-CMOS circuit design include the following: variability, leakage, power, thermals, reliability, and yield. This talk will focus on interdependent considerat...
ISSS
2002
IEEE
15 years 4 months ago
2002
IEEE
We introduce a new approach, “Dynamic Common Sub-expression Elimination (CSE)”, that dynamically eliminates common sub- expressions based on new opportunities created during s...