428 search results - page 66 / 86 » Validating High-Level Synthesis |
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ICST
2011
IEEE
14 years 3 months ago
2011
IEEE
User input validation is a technique to counter attacks on web applications. In typical client-server architectures, this validation is performed on the client side. This is ineff...
DAGSTUHL
2006
15 years 1 months ago
2006
Verification and Simulation share many issues, one is that simulation models require validation and verification. In the context of simulation, verification is understood as the ta...
DAC
2001
ACM
16 years 25 days ago
2001
ACM
Milenko Drinic UCLA Computer Science Dep. 4732 Boelter Hall Los Angeles, CA 90095-1596 milenko@cs.ucla.edu Darko Kirovski Microsoft Research One Microsoft Way Redmond, WA 98052 da...
DAC
2006
ACM
16 years 25 days ago
2006
ACM
Design space exploration during high level synthesis is often conducted through ad-hoc probing of the solution space using some scheduling algorithm. This is not only time consumi...
VLSID
2006
IEEE
16 years 7 days ago
2006
IEEE
SoC design methodologies are under constant revision due to adoption of fast shrinking process technologies at nanometer levels. Nanometer process geometries exhibit new complex d...