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» Validating High-Level Synthesis
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VLSID
2006
IEEE
192views VLSI» more  VLSID 2006»
15 years 5 months ago
Beyond RTL: Advanced Digital System Design
This tutorial focuses on advanced techniques to cope with the complexity of designing modern digital chips which are complete systems often containing multiple processors, complex...
Shiv Tasker, Rishiyur S. Nikhil
DATE
2004
IEEE
175views Hardware» more  DATE 2004»
15 years 3 months ago
Breaking Instance-Independent Symmetries in Exact Graph Coloring
Code optimization and high level synthesis can be posed as constraint satisfaction and optimization problems, such as graph coloring used in register allocation. Graph coloring is...
Arathi Ramani, Fadi A. Aloul, Igor L. Markov, Kare...
ECRA
2002
180views more  ECRA 2002»
14 years 11 months ago
vCOM: Electronic commerce in a collaborative virtual world
Existing e-commerce applications on the web provide the users a relatively simple, browser-based interface to access available products. Customers are not provided with the same s...
Xiaojun Shen, T. Radakrishnan, Nicolas D. Georgana...
ICCAD
2001
IEEE
201views Hardware» more  ICCAD 2001»
15 years 8 months ago
An Integrated Data Path Optimization for Low Power Based on Network Flow Method
Abstract: We propose an effective algorithm for power optimization in behavioral synthesis. In previous work, it has been shown that several hardware allocation/binding problems fo...
Chun-Gi Lyuh, Taewhan Kim, Chien-Liang Liu
CORR
2008
Springer
144views Education» more  CORR 2008»
14 years 12 months ago
Modular Compilation of a Synchronous Language
Synchronous languages rely on formal methods to ease the development of applications in an efficient and reusable way. Formal methods have been advocated as a means of increasing t...
Annie Ressouche, Daniel Gaffé, Valér...