428 search results - page 76 / 86 » Validating High-Level Synthesis |
125
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SIGSOFT
2003
ACM
16 years 2 months ago
2003
ACM
State machine based formalisms such as labelled transition systems (LTS) are generally assumed to be complete descriptions m behaviour at some level of abstraction: if a labelled ...
118
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DAC
2004
ACM
16 years 2 months ago
2004
ACM
Long design cycles due to the inability to predict silicon realities is a well-known problem that plagues analog/RF integrated circuit product development. As this problem worsens...
128
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DAC
2005
ACM
16 years 2 months ago
2005
ACM
We propose a system architecture for real-time hardware speech recognition on low-cost, power-constrained devices. The system is intended to support real-time speech-based user in...
126
Voted
ICCD
2006
IEEE
15 years 10 months ago
2006
IEEE
Technology trends are driving parallel on-chip architectures in the form of multi-processor systems-on-a-chip (MPSoCs) and chip multi-processors (CMPs). In these systems the incre...
115
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SAMOS
2007
Springer
15 years 7 months ago
2007
Springer
—This paper presents a new methodology based on evolutionary multi-objective optimization (EMO) to synthesize multiple complex modules on programmable devices (FPGAs). It starts ...