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» Validating High-Level Synthesis
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CASES
2004
ACM
15 years 5 months ago
High-level power analysis for on-chip networks
As on-chip networks become prevalent in multiprocessor systemson-a-chip and multi-core processors, they will be an integral part of the design flow of such systems. With power in...
Noel Eisley, Li-Shiuan Peh
ICCS
2007
Springer
15 years 3 months ago
Building Verifiable Sensing Applications Through Temporal Logic Specification
Abstract. Sensing is at the core of virtually every DDDAS application. Sensing applications typically involve distributed communication and coordination over large self-organized n...
Asad Awan, Ahmed H. Sameh, Suresh Jagannathan, Ana...
ICCD
1997
IEEE
158views Hardware» more  ICCD 1997»
15 years 3 months ago
Practical Advances in Asynchronous Design
Asynchronous systems are being viewed as an increasingly viable alternative to purely synchronous systems. This paper gives an overview of the current state of the art in practica...
Erik Brunvand, Steven M. Nowick, Kenneth Y. Yun
AAAI
2000
15 years 1 months ago
The Systems Engineering Process Activities (SEPA) Methodology and Tool Suite
or cone, abstraction is chosen to represent a spectrum of user inputs/requirements that are narrowed, refined, and structured into a system design. User inputs require refinement f...
K. Suzanne Barber, Thomas J. Graser, Paul Grisham,...
ECCV
2008
Springer
16 years 1 months ago
Estimating 3D Face Model and Facial Deformation from a Single Image Based on Expression Manifold Optimization
Facial expression modeling is central to facial expression recognition and expression synthesis for facial animation. Previous works reported that modeling the facial expression wi...
Shu-Fan Wang, Shang-Hong Lai