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» Validating Register Allocation and Spilling
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PLDI
2005
ACM
13 years 11 months ago
Demystifying on-the-fly spill code
Modulo scheduling is an effective code generation technique that exploits the parallelism in program loops by overlapping iterations. One drawback of this optimization is that reg...
Alex Aletà, Josep M. Codina, Antonio Gonz&a...
CASES
2003
ACM
13 years 10 months ago
Efficient spill code for SDRAM
Processors such as StrongARM and memory such as SDRAM enable efficient execution of multiple loads and stores in a single instruction. This is particularly useful in connection wi...
V. Krishna Nandivada, Jens Palsberg
CODES
2000
IEEE
13 years 10 months ago
Heuristic tradeoffs between latency and energy consumption in register assignment
One of the challenging tasks in code generation for embedded systems is register allocation and assignment, wherein one decides on the placement and lifetimes of variables in regi...
R. Anand, Margarida F. Jacome, Gustavo de Veciana
PLDI
2006
ACM
14 years 6 days ago
A global progressive register allocator
This paper describes a global progressive register allocator, a register allocator that uses an expressive model of the register allocation problem to quickly find a good allocat...
David Ryan Koes, Seth Copen Goldstein
IEEEPACT
2003
IEEE
13 years 11 months ago
Resolving Register Bank Conflicts for a Network Processor
This paper discusses a register bank assignment problem for a popular network processor--Intel's IXP. Due to limited data paths, the network processor has a restriction that ...
Xiaotong Zhuang, Santosh Pande