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» Validation Method for Intelligent Systems
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ASPLOS
2000
ACM
15 years 10 months ago
FLASH vs. (Simulated) FLASH: Closing the Simulation Loop
Simulation is the primary method for evaluating computer systems during all phases of the design process. One significant problem with simulation is that it rarely models the syst...
Jeff Gibson, Robert Kunz, David Ofelt, Mark Heinri...
DATE
2010
IEEE
145views Hardware» more  DATE 2010»
15 years 10 months ago
Energy-efficient real-time task scheduling with temperature-dependent leakage
Abstract--Leakage power consumption contributes significantly to the overall power dissipation for systems that are manufactured in advanced deep sub-micron technology. Different f...
Chuan-Yue Yang, Jian-Jia Chen, Lothar Thiele, Tei-...
139
Voted
CCS
1994
ACM
15 years 10 months ago
Protocol Failure in the Escrowed Encryption Standard
The Escrowed Encryption Standard (EES) defines a US Government family of cryptographic processors, popularly known as "Clipper" chips, intended to protect unclassified g...
Matt Blaze
FROCOS
2007
Springer
15 years 10 months ago
Certification of Automated Termination Proofs
Abstract. Nowadays, formal methods rely on tools of different kinds: proof assistants with which the user interacts to discover a proof step by step; and fully automated tools whic...
Evelyne Contejean, Pierre Courtieu, Julien Forest,...
CODES
2004
IEEE
15 years 10 months ago
Efficient exploration of on-chip bus architectures and memory allocation
Separation between computation and communication in system design allows the system designer to explore the communication architecture independently of component selection and map...
Sungchan Kim, Chaeseok Im, Soonhoi Ha