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» Validation and Verification of Simulation Models
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EURODAC
1994
IEEE
122views VHDL» more  EURODAC 1994»
15 years 1 months ago
Compiled-code-based simulation with timing verification
Due to the complexity of today's systems, prototyping by simulation must be based on simulation-engine-like performance. It is proved by implementations that compiler-driven ...
Winfried Hahn, Andreas Hagerer, C. Herrmann
DATE
2008
IEEE
122views Hardware» more  DATE 2008»
15 years 4 months ago
Simulation-Directed Invariant Mining for Software Verification
With the advance of SAT solvers, transforming a software program to a propositional formula has generated much interest for bounded model checking of software in recent years. How...
Xueqi Cheng, Michael S. Hsiao
ISCAS
2006
IEEE
128views Hardware» more  ISCAS 2006»
15 years 3 months ago
Modeling and verification of high-speed wired links with Verilog-AMS
—Behavioral modeling with virtual built-in self-test verification of high-speed wired link designs is described in this paper. Our procedure is based on principles of top-down mi...
Ming-Ta Hsieh, Gerald E. Sobelman
CORR
2010
Springer
214views Education» more  CORR 2010»
14 years 9 months ago
Modeling Network Coded TCP Throughput: A Simple Model and its Validation
We analyze the performance of TCP and TCP with network coding (TCP/NC) in lossy wireless networks. We build upon the simple framework introduced by Padhye et al. and characterize t...
MinJi Kim, Muriel Médard, João Barro...
GECCO
2005
Springer
127views Optimization» more  GECCO 2005»
15 years 3 months ago
Sufficiency verification of HIV-1 pathogenesis based on multi-agent simulation
Researchers of HIV-1 are today, still unable to determine exactly the biological mechanisms that cause AIDS. Various mechanisms have been hypothesized and their existences have be...
Zaiyi Guo, Hann Kwang Han, Joc Cing Tay