Sciweavers

7 search results - page 1 / 2
» Validation of an Advanced Encryption Standard (AES) IP Core
Sort
View
78
Voted
FCCM
2004
IEEE
121views VLSI» more  FCCM 2004»
15 years 1 months ago
Validation of an Advanced Encryption Standard (AES) IP Core
This paper describes the package of test bench code required to verify the Algotronix' AES IP Core. Several authors (see the references in [3]) have published papers detailing...
Valeri F. Tomashau, Tom Kean
CATA
2010
14 years 9 months ago
A Hardware Implementation of the Advanced Encryption Standard (AES) Algorithm using SystemVerilog
In this paper, a hardware implementation of the AES128 encryption algorithm is proposed. A unique feature of the proposed pipelined design is that the round keys, which are consum...
Bahram Hakhamaneshi, Behnam S. Arad
DSD
2006
IEEE
183views Hardware» more  DSD 2006»
15 years 3 months ago
Design and Implementation of Low-Area and Low-Power AES Encryption Hardware Core
The Advanced Encryption Standard (AES) algorithm has become the default choice for various security services in numerous applications. In this paper we present an AES encryption h...
Panu Hämäläinen, Timo Alho, Marko H...
WCE
2007
14 years 10 months ago
Secure Multicarrier Modem on FPGA
— The paper deals with the design and realization of a secure multicarrier modem on FPGA. The crypto-modem principle is adopted. An encryption block is integrated in the modem tr...
Galia Marinova, Vassil Guliashki, Didier Le Ruyet,...
DATE
2003
IEEE
92views Hardware» more  DATE 2003»
15 years 2 months ago
A Low Device Occupation IP to Implement Rijndael Algorithm
This work presents a soft IP description of Rijndael, the Advanced Encryption Standard (AES) of National Institute of Standards and Technology (NIST). This Rijndael implementation...
Alex Panato, Marcelo Barcelos, Ricardo Augusto da ...