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ICIP
2003
IEEE
15 years 11 months ago
Parallel-pipelined architecture for 2-D ICT VLSI implementation
The Integer Cosine Transform (ICT) has been shown to be an alternative to the DCT for image processing. This paper presents a parallel-pipelined architecture of an 8x8 ICT(10, 9, ...
Juan A. Michell, Gustavo A. Ruiz, Angel M. Buron

Publication
241views
14 years 11 months ago
Fast compositing for cluster-parallel rendering
The image compositing stages in cluster-parallel rendering for gathering and combining partial rendering results into a final display frame are fundamentally limited by node-to-nod...
Maxim Makhinya, Stefan Eilemann, Renato Pajarola
ICMCS
2009
IEEE
136views Multimedia» more  ICMCS 2009»
14 years 7 months ago
Single-iteration full-search fractional motion estimation for quad full HD H.264/AVC encoding
Fractional motion estimation (FME) is widely used in video compression standards. In H.264/AVC, the precision of motion vector is down to quarter pixels to improve the coding effi...
Pei-Kuei Tsung, Wei-Yin Chen, Li-Fu Ding, Chuan-Yu...
CGF
2002
149views more  CGF 2002»
14 years 9 months ago
Using Perceptual Texture Masking for Efficient Image Synthesis
Texture mapping has become indispensable in image synthesis as an inexpensive source of rich visual detail. Less obvious, but just as useful, is its ability to mask image errors d...
Bruce Walter, Sumanta N. Pattanaik, Donald P. Gree...
AES
2005
Springer
137views Cryptology» more  AES 2005»
14 years 9 months ago
Design of a multimedia processor based on metrics computation
Media-processing applications, such as signal processing, 2D and 3D graphics rendering, and image compression, are the dominant workloads in many embedded systems today. The real-...
Nader Ben Amor, Yannick Le Moullec, Jean-Philippe ...