10 search results - page 2 / 2 » Value Predictors for Reuse through Speculation on Traces |
84
Voted
ICS
1999
Tsinghua U.
15 years 3 months ago
1999
Tsinghua U.
In this paper we present a processor microarchitecture that can simultaneously execute multiple threads and has a clustered design for scalability purposes. A main feature of the ...
99
Voted
JSA
2006
14 years 11 months ago
2006
It is often possible to greatly improve the performance of a hardware system via the use of predictive (speculative) techniques. For example, the performance of out-of-order micro...
ISCA
1999
IEEE
15 years 3 months ago
1999
IEEE
Value Prediction is a relatively new technique to increase instruction-level parallelism by breaking true data dependence chains. A value prediction architecture produces values, ...
103
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MICRO
2010
IEEE
14 years 9 months ago
2010
IEEE
As the number of cores on a single chip increases with more recent technologies, a packet-switched on-chip interconnection network has become a de facto communication paradigm for ...
DAC
2005
ACM
16 years 17 days ago
2005
ACM
In this work, we propose a new paradigm called power emulation, which exploits hardware acceleration to drastically speedup power estimation. Power emulation is based on the obser...