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ARC
2010
Springer
183views Hardware» more  ARC 2010»
14 years 9 months ago
Integrated Design Environment for Reconfigurable HPC
Using FPGAs to accelerate High Performance Computing (HPC) applications is attractive, but has a huge associated cost: the time spent, not for developing efficient FPGA code but fo...
Lilian Janin, Shoujie Li, Doug Edwards
CODES
2007
IEEE
15 years 3 months ago
Performance analysis and design space exploration for high-end biomedical applications: challenges and solutions
High-end biomedical applications are a good target for specificpurpose system-on-chip (SoC) implementations. Human heart electrocardiogram (ECG) real-time monitoring and analysis ...
Iyad Al Khatib, Davide Bertozzi, Axel Jantsch, Luc...
CODES
2007
IEEE
15 years 3 months ago
Improved response time analysis of tasks scheduled under preemptive Round-Robin
Round-Robin scheduling is the most popular time triggered scheduling policy, and has been widely used in communication networks for the last decades. It is an efficient schedulin...
Razvan Racu, Li Li, Rafik Henia, Arne Hamann, Rolf...
CODES
2007
IEEE
15 years 3 months ago
Complex task activation schemes in system level performance analysis
The design and analysis of today’s complex real-time systems requires advanced methods. Due to ever growing functionality, hardware complexity and component interaction, applyin...
Wolfgang Haid, Lothar Thiele
DCOSS
2010
Springer
15 years 2 months ago
Programming Sensor Networks Using Remora Component Model
Abstract. The success of high-level programming models in Wireless Sensor Networks (WSNs) is heavily dependent on factors such as ease of programming, code well-structuring, degree...
Amirhosein Taherkordi, Frédéric Loir...