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ECIR
2004
Springer
15 years 5 months ago
Performance Analysis of Distributed Architectures to Index One Terabyte of Text
We simulate different architectures of a distributed Information Retrieval system on a very large Web collection, in order to work out the optimal setting for a particular set of r...
Fidel Cacheda, Vassilis Plachouras, Iadh Ounis
DATE
2006
IEEE
85views Hardware» more  DATE 2006»
15 years 10 months ago
Optimizing high speed arithmetic circuits using three-term extraction
Carry Save Adder (CSA) trees are commonly used for high speed implementation of multi-operand additions. We present a method to reduce the number of the adders in CSA trees by ext...
Anup Hosangadi, Farzan Fallah, Ryan Kastner
DAC
2000
ACM
15 years 8 months ago
An asymptotically constant, linearly bounded methodology for the statistical simulation of analog circuits including component m
Abstract: This paper presents a new statistical methodology to simulate the effect of both inter-die and intra-die variation on the electrical performance of analog integrated circ...
Carlo Guardiani, Sharad Saxena, Patrick McNamara, ...
GLOBECOM
2009
IEEE
15 years 8 months ago
Optimized Protection Schemes for Resilient Interdomain Traffic Distribution
Abstract-- Due to the development of Next Generation Networks, leading to a multiservice transport layer with a multidomain environment, the importance of interconnection issues ke...
Miroslaw Kantor, Piotr Cholda, Andrzej Jajszczyk
ASPDAC
2008
ACM
89views Hardware» more  ASPDAC 2008»
15 years 6 months ago
Load scheduling: Reducing pressure on distributed register files for free
In this paper we describe load scheduling, a novel method that balances load among register files by residual resources. Load scheduling can reduce register pressure for clustered...
Mei Wen, Nan Wu, Maolin Guan, Chunyuan Zhang