A structurally testable delay fault might become untestable in the functional mode of the circuit due to logic or timing constraints or both. Experimental data suggests that there...
In this article, we introduce the approach to the realization of ontogenetic development and fault tolerance that will be implemented in the POEtic tissue, a novel reconfigurable ...
Gianluca Tempesti, Daniel Roggen, Eduardo Sanchez,...
An incremental simulation-based approach to fault diagnosis and logic debugging is presented. During each iteration of the algorithm, a single suspicious location is identified a...
Andreas G. Veneris, Jiang Brandon Liu, Mandana Ami...
Recently mobile agent technology has been recognised as a potential tool for realising distributed network fault management. The autonomy and mobility of such agents can help ensu...
: For the characteristics of malfunction diagnose system a model to classify fault printing based on support vector machines is discussed. The printing malfunctions have many class...