— This paper extends the notion of residuals for fault detection, well known in the continuous system to the timed discrete events systems. The aim is to design the fault indicat...
We present an efficient algorithm for identification of two-line bridges in combinational CMOS logic that narrows down the two-line bridge candidates based on tester responses for...
Thomas J. Vogels, Wojciech Maly, R. D. (Shawn) Bla...
This paper presents two new algorithms, Redundant Vector Elimination(RVE) and Essential Fault Reduction (EFR), for generating compact test sets for combinational circuits under th...
The contribution of this paper is threefold. First, an improvement to a previously published paper on the timing analysis of Controller Area Network (CAN) in the presence of trans...
Abstract. This paper shows that asynchronous fault detection is a practical way to reflect partial failure in a network-transparent distributed programming language. In the network...