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» Variation-aware routing for FPGAs
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FPL
2003
Springer
119views Hardware» more  FPL 2003»
15 years 2 months ago
Hardware Implementations of Real-Time Reconfigurable WSAT Variants
Local search methods such as WSAT have proven to be successful for solving SAT problems. In this paper, we propose two host-FPGA (Field Programmable Gate Array) co-implementations,...
Roland H. C. Yap, Stella Z. Q. Wang, Martin Henz
FCCM
1999
IEEE
111views VLSI» more  FCCM 1999»
15 years 1 months ago
Optimizing FPGA-Based Vector Product Designs
This paper presents a method, called multiple constant multiplier trees MCMTs, for producing optimized recon gurable hardware implementations of vector products. An algorithm for ...
Dan Benyamin, John D. Villasenor, Wayne Luk
APCSAC
2001
IEEE
15 years 1 months ago
The First Real Operating System for Reconfigurable Computers
Traditional reconfigurable computing platforms are designed to be single user and have been acknowledged to be difficult to design applications for. The design tools are still pri...
Grant B. Wigley, David A. Kearney
66
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FPGA
2008
ACM
131views FPGA» more  FPGA 2008»
14 years 11 months ago
WireMap: FPGA technology mapping for improved routability
This paper presents a new technology mapper, WireMap. The mapper uses an edge flow heuristic to improve the routability of a mapped design. The heuristic is applied during the ite...
Stephen Jang, Billy Chan, Kevin Chung, Alan Mishch...
60
Voted
DAC
2002
ACM
15 years 10 months ago
Solving difficult SAT instances in the presence of symmetry
Research in algorithms for Boolean satisfiability and their efficient implementations [26, 8] has recently outpaced benchmarking efforts. Most of the classic DIMACS benchmarks fro...
Fadi A. Aloul, Arathi Ramani, Igor L. Markov, Kare...