809 search results - page 10 / 162 » Variations in Cache Behavior |
72
Voted
ISCA
2009
IEEE
15 years 4 months ago
2009
IEEE
Many multi-core processors employ a large last-level cache (LLC) shared among the multiple cores. Past research has demonstrated that sharing-oblivious cache management policies (...
ISCA
1990
IEEE
15 years 1 months ago
1990
IEEE
An adaptive cache coherence mechanism exploits semantic information about the expected or observed access behavior of particular data objects. We contend that, in distributed shar...
ANSS
2004
IEEE
15 years 1 months ago
2004
IEEE
To enable optimizations in memory access behavior of high performance applications, cache monitoring is a crucial process. Simulation of cache hardware is needed in order to allow...
105
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PE
2006
Springer
14 years 9 months ago
2006
Springer
In a multi-level cache such as those used for web caching, a hit at level l leads to the caching of the requested object in all intermediate caches on the reverse path (levels l -...
101
Voted
CAL
2007
14 years 9 months ago
2007
—As transistor feature sizes continue to shrink into the sub-90nm range and beyond, the effects of process variations on critical path delay and chip yields have amplified. A com...