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LCPC
2001
Springer
15 years 6 months ago
Strength Reduction of Integer Division and Modulo Operations
Integer division, modulo, and remainder operations are expressive and useful operations. They are logical candidates to express complex data accesses such as the wrap-around behav...
Jeffrey Sheldon, Walter Lee, Ben Greenwald, Saman ...
IEEEPACT
2000
IEEE
15 years 6 months ago
Neighborhood Prefetching on Multiprocessors Using Instruction History
A multiprocessor prefetch scheme is described in which a miss is followed by a prefetch of a group of lines, a neighborhood, surrounding the demand-fetched line. The neighborhood ...
David M. Koppelman
SPAA
1999
ACM
15 years 6 months ago
Recursive Array Layouts and Fast Parallel Matrix Multiplication
Matrix multiplication is an important kernel in linear algebra algorithms, and the performance of both serial and parallel implementations is highly dependent on the memory system...
Siddhartha Chatterjee, Alvin R. Lebeck, Praveen K....
ICCD
1999
IEEE
110views Hardware» more  ICCD 1999»
15 years 6 months ago
TriMedia CPU64 Architecture
We present a new VLIW core as a successor to the TriMedia TM1000. The processor is targeted for embedded use in media-processing devices like DTVs and set-top boxes. Intended as a...
Jos T. J. van Eijndhoven, Kees A. Vissers, Evert-J...
FMCAD
2007
Springer
15 years 5 months ago
Transaction Based Modeling and Verification of Hardware Protocols
Modeling hardware through atomic guard/action transitions with interleaving semantics is popular, owing to the conceptual clarity of modeling and verifying the high level behavior ...
Xiaofang Chen, Steven M. German, Ganesh Gopalakris...