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ICCD
2005
IEEE
109views Hardware» more  ICCD 2005»
15 years 8 months ago
Optimizing the Thermal Behavior of Subarrayed Data Caches
Designing temperature-aware microarchitectures for microprocessors at new technologies is becoming a critical requirement due to the exponentially increasing on-chip power density...
Johnsy K. John, Jie S. Hu, Sotirios G. Ziavras
82
Voted
ATVA
2004
Springer
117views Hardware» more  ATVA 2004»
15 years 5 months ago
Component-Wise Instruction-Cache Behavior Prediction
nded Abstract – Oleg Parshin∗ Abdur Rakib† Stephan Thesing∗ Reinhard Wilhelm∗ The precise determination of worst-case execution times (WCETs) for programs is mostly bein...
Abdur Rakib, Oleg Parshin, Stephan Thesing, Reinha...
ASPLOS
2008
ACM
15 years 1 months ago
Exploiting access semantics and program behavior to reduce snoop power in chip multiprocessors
Integrating more processor cores on-die has become the unanimous trend in the microprocessor industry. Most of the current research thrusts using chip multiprocessors (CMPs) as th...
Chinnakrishnan S. Ballapuram, Ahmad Sharif, Hsien-...
SIGMETRICS
1998
ACM
15 years 3 months ago
Modeling Set Associative Caches Behavior for Irregular Computations
While much work has been devoted to the study of cache behavior during the execution of codes with regular access patterns, little attention has been paid to irregular codes. An i...
Basilio B. Fraguela, Ramon Doallo, Emilio L. Zapat...
WCET
2010
14 years 9 months ago
Bounding the Effects of Resource Access Protocols on Cache Behavior
The assumption of task independence has long been consubstantial with the formulation of many schedulability analysis techniques. That assumption is evidently advantageous for the...
Enrico Mezzetti, Marco Panunzio, Tullio Vardanega