809 search results - page 29 / 162 » Variations in Cache Behavior |
ISLPED
2003
ACM
15 years 5 months ago
2003
ACM
In this paper, we investigate methods for improving the hit rates in the first level of memory hierarchy. Particularly, we propose victim cache structures to reduce the number of ...
GLVLSI
2010
IEEE
15 years 4 months ago
2010
IEEE
On-chip memory organization is one of the most important aspects that can influence the overall system behavior in multiprocessor systems. Following the trend set by high-perform...
108
click to vote
IPPS
2010
IEEE
14 years 9 months ago
2010
IEEE
Abstract-- Recent studies have shown that cache partitioning is an efficient technique to improve throughput, fairness and Quality of Service (QoS) in CMP processors. The cache par...
DAC
2008
ACM
16 years 23 days ago
2008
ACM
Multimedia-dominated consumer electronics devices (such as cellular phone, digital camera, etc.) operate under soft real-time constraints. Overly pessimistic worst-case execution ...
CAL
2007
14 years 11 months ago
2007
Abstract— Cache Partitioning has been proposed as an interesting alternative to traditional eviction policies of shared cache levels in modern CMP architectures: throughput is im...