809 search results - page 61 / 162 » Variations in Cache Behavior |
104
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ISCA
2000
IEEE
15 years 4 months ago
2000
IEEE
For many applications, branch mispredictions and cache misses limit a processor’s performance to a level well below its peak instruction throughput. A small fraction of static i...
SIGCOMM
1995
ACM
15 years 3 months ago
1995
ACM
Integrated Layer Processing (ILP) is an implementation concept which "permit[s] the implementor the option of performing all the [data] manipulation steps in one or two integ...
112
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ISLPED
2010
ACM
15 years 1 days ago
2010
ACM
On-chip coherence directories of today's multi-core systems are not energy efficient. Coherence directories dissipate a significant fraction of their power on unnecessary loo...
LCPC
2005
Springer
15 years 5 months ago
2005
Springer
There is growing interest in autonomic computing systems that can optimize their own behavior on different platforms without manual intervention. Examples of successful self-opti...
TC
2011
14 years 6 months ago
2011
— Implementing shared memory consistency models on top of hardware caches gives rise to the well-known cache coherence problem. The standard solution involves implementing cohere...