809 search results - page 70 / 162 » Variations in Cache Behavior |
132
Voted
HPCA
2008
IEEE
16 years 3 months ago
2008
IEEE
The trend towards integrating multiple cores on the same die has accentuated the need for larger on-chip caches. Such large caches are constructed as a multitude of smaller cache ...
123
Voted
VEE
2005
ACM
15 years 8 months ago
2005
ACM
Virtual execution environments have become increasingly useful in system implementation, with dynamic translation techniques being an important component for performance-critical ...
136
Voted
CASES
2011
ACM
14 years 2 months ago
2011
ACM
Escalating variations in modern CMOS designs have become a threat to Moore’s law. While previous works have proposed techniques for tolerating variations by trading reliability ...
128
Voted
HPCA
1999
IEEE
15 years 7 months ago
1999
IEEE
We propose Instruction-based Prediction as a means to optimize directory-based cache coherent NUMA shared-memory. Instruction-based prediction is based on observing the behavior o...
111
Voted
SPAA
1990
ACM
15 years 6 months ago
1990
ACM
Multithreading has been proposed as an architectural strategy for tolerating latency in multiprocessors and, through limited empirical studies, shown to offer promise. This paper ...