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CGO
2003
IEEE
15 years 3 months ago
METRIC: Tracking Down Inefficiencies in the Memory Hierarchy via Binary Rewriting
In this paper, we present METRIC, an environment for determining memory inefficiencies by examining data traces. METRIC is designed to alter the performance behavior of applicatio...
Jaydeep Marathe, Frank Mueller, Tushar Mohan, Bron...
TII
2010
124views Education» more  TII 2010»
14 years 6 months ago
Address-Independent Estimation of the Worst-case Memory Performance
Abstract--Real-time systems are subject to temporal constraints and require a schedulability analysis to ensure that task execution finishes within lower and upper specified bounds...
Basilio B. Fraguela, Diego Andrade, Ramon Doallo
EUROPAR
2007
Springer
15 years 6 months ago
Locality Optimized Shared-Memory Implementations of Iterated Runge-Kutta Methods
Iterated Runge-Kutta (IRK) methods are a class of explicit solution methods for initial value problems of ordinary differential equations (ODEs) which possess a considerable poten...
Matthias Korch, Thomas Rauber
DATE
2000
IEEE
113views Hardware» more  DATE 2000»
15 years 4 months ago
Static Timing Analysis of Embedded Software on Advanced Processor Architectures
This paper examines several techniques for static timing analysis. In detail, the first part of the paper analyzes the connection of prediction accuracy (worst case execution tim...
André Hergenhan, Wolfgang Rosenstiel
EUROPAR
2000
Springer
15 years 3 months ago
Automatic Generation of Block-Recursive Codes
Abstract. Block-recursive codes for dense numerical linear algebra computations appear to be well-suited for execution on machines with deep memory hierarchies because they are e e...
Nawaaz Ahmed, Keshav Pingali